Earlier testing without expensive instruments will drive faster development of new Electronic Warfare sensors. Help us achieve this by simulating IQ-samples in FPGAs!
Your role
Background
Signal generators are indispensable for testing radar receiver systems, but they can be expensive and cumbersome to work with. Additionally, the analog hardware components of the receiver have to be finished before the programmable logic and software components can be tested. In this thesis project you will explore methods for generating digital samples directly in FPGA logic, thereby minimizing the need for additional hardware and allowing us to develop new systems faster, easier, and cheaper.
Description of the master thesis
The objective of the project is to design a system for generating digital samples in an FPGA, emulating the data that would be produced by an Analog-to-Digital converter (ADC) sampling a real radar signal. The purpose of the system is to enable rapid prototyping of new digital receiver functionality by reducing the hardware requirements to only the FPGA running the system under development, and the FPGA generating digital samples.
The samples should be generated according to a simple signal descriptor. This enables the descriptors to be loaded into memory or streamed to the generator over ethernet with a relatively low bandwidth requirement, compared to the hundreds of gigabits per second required to stream samples directly.
There are several interesting questions and challenges to tackle in this project. Not all of them can fit into the scope of a single thesis project, so you are encouraged to select a few that sound the most interesting and focus on those:
- Direct Digital Synthesis (DDS) is suggested as a starting point for generating samples. Investigate alternative methods to find the one best suited for the use case.
- Generating sample rates matching modern ADC’s may not be possible in real-time. Develop an architecture capable of preprocessing and buffering data to enable longer bursts of generated data before the buffer runs out. Analyzing how the solution scales with additional FPGA resources is of particular interest.
- Propose a method to take advantage of similarities between signal descriptors in the same generation run, to reduce the amount of computation required to generate the samples and thus increase the maximum possible sample rate.
- Design a method to create multiple output copies of a signal with controllable differences in phase and amplitude between the copies. This should be controllable on a per signal descriptor basis, and not require multiple instances of the core signal generation logic.
- Implement more complicated types of signals, for example signals with continuously increasing frequencies (chirps) or phase shifts.
You will be part of a team of engineers building products for Electronic Warfare used in systems like Global Eye or Gripen. Read more about Electronic Warfare at https://www.saab.com/products/air/electronic-warfare.
Your profile
This Master Thesis is suitable for one student with interest in signal processing and FPGA design.
You are at the end of your Master and about to start your thesis work for 30 HP. We think you have studied Electrical Engineering, Computer Science, Applied Physics or something similar.
To succeed in this project we believe you have a good understanding of FPGA design, familiarity with VHDL or System Verilog, and a basic understanding of digital sampling and signal processing. Skill with C++ or Python, and Matlab, is useful but not required.
This position requires that you pass a security vetting based on the current regulations around/of security protection. For positions requiring security clearance additional obligations on citizenship may apply.
What you will be a part of
Behind our innovations stand the people who make them possible. Brave pioneers and curious minds. Everyday heroes and inventive troubleshooters. Those who share deep knowledge and those who explore sky-high. And everyone in between.
Joining us means making an impact together, contributing in our own unique ways. From crafting complex code and building impressive defence and security solutions to simply sharing a coffee with a colleague, every action counts. We encourage you to take on challenges, to create smart inventions and grow in our friendly and tech-savvy workspace. We have a solid mission to keep people and society safe.
Saab is a leading defence and security company with an enduring mission, to help nations keep their people and society safe. Empowered by its 23,000 talented people, Saab constantly pushes the boundaries of technology to create a safer and more sustainable world.
Saab designs, manufactures and maintains advanced systems in aeronautics, weapons, command and control, sensors and underwater systems. Saab is headquartered in Sweden. It has major operations all over the world and is part of the domestic defence capability of several nations. Read more about us here
Last application day
30-11-2024
Contact information
Hannah Lindström Master Thesis Supervisor
073-446 0035
Mats Järgenstedt, Manager
073-437 5019